Adaptec AIC-6915 Informazioni Techniche Pagina 175
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8-15
Sample Driver
Receive Interrupt Handling
When a packet is received, the AIC-6915 adds a new entry to the Receive Completion
Descriptor Queue and generates either an
E
ARLY
R
X
Q1I
NT
(or
E
ARLY
R
X
Q2I
NT
) or an
R
X
Q1D
ONE
I
NT
(or
R
X
Q2D
ONE
I
NT
), depending on which receive interrupts have been
enabled. When the driver processes this interrupt, it must first read the Receive
Completion Queue consumer and producer indices. For a single completion queue
implementation, these indices are contained in registers
C
OMPLETION
Q
UEUE
1C
ONSUMER
I
NDEX
and
C
OMPLETION
Q
UEUE
1P
RODUCER
I
NDEX
. The
consumer index points to the next Receive Completion Descriptor which has not yet been
processed by the driver. In this Receive Completion Descriptor, the
E
ND
I
NDEX
field is an
index to the Receive Buffer Descriptor which contains the packet just received. The driver
uses this index to extract the Receive Buffer containing the packet just received. The
packet length and receive status are also contained in the Completion Descriptor.
Example:
// Windows NT example
// Receive Interrupt Handling Pseudocode
// This example is for the polling model
// Illustrates the use of a single Receive Completion Queue and Receive Buffer
// Queue
// Process the receive interrupt
// Read the Completion Queue pointer registers
AIC6915_READ_REG(Adapter->RegisterBaseVa->CompletionQueue1ProducerIndex,
&CompletionQueue1ProducerValue);
AIC6915_READ_REG(Adapter->RegisterBaseVa->CompletionQueue1ConsumerIndex,
&CompletionQueue1ConsumerValue);
// Get the Receive Completion Queue producer and consumer index fields
RxComQProducerIndex =
CompletionQueue1ProducerValue.RxCompletionQ1ProducerIndex;
RxComQConsumerIndex =
CompletionQueue1ConsumerValue.RxCompletionQ1ConsumerIndex;
// We got a receive interrupt. Process all Completion Queue entries until
// we’re caught up.
while (RxComQConsumerIndex != RxComQProducerIndex )
{
// Get the completion descriptor pointed to by the current consumer index
RxCompletionDesc = Adapter->RxCompletionDesc[RxComQConsumerIndex];
// Get the buffer descriptor index
RxDescIndex = RxCompletionDesc->EndIndex;
// Get the receive status and packet length
RxStatus = (USHORT)RxCompletionDesc->Status1;
Length = (USHORT)RxCompletionDesc->Length;
// Using the EndIndex in the completion descriptor, get the current
// receive buffer
- AIC-6915 1
- © 1998, Adaptec, Inc 2
- Electronic Support 4
- Technical and Product Support 4
- Contents 5
- 4 PCI Module Architecture 6
- 7 Register Descriptions 7
- 8 Sample Driver 7
- ▼ ▼ ▼ ▼ 11
- Introduction 15
- Ethernet 16
- Internal Buffer Management 17
- 32/64-bit PCI 17
- Block Diagram 19
- Receive Architecture 21
- Producer and Consumer Indices 22
- Receive DMA Descriptor Queues 22
- Normal Mode 23
- Polling Mode 23
- 32-bit Addressing Mode 24
- 64-bit Addressing Mode 24
- Accepting frames 25
- Start Index 26
- Transmit Architecture 31
- CALTCP bit to zero in the 32
- Transmit Data Structure 34
- Transmit Register Set 35
- PCI Module Architecture 43
- PCI Block Diagram 45
- PCI Master Module 46
- 64-bit PCI Bus Master 47
- Arbitration 48
- Power Management 50
- Retry Function 51
- Response to PCI Commands 51
- Configuration Address Space 53
- Expansion ROM Address Space 54
- Memory Address Space 54
- Illegal Behavior 56
- Frame Processor Architecture 57
- Wake-up Mode 58
- Transmit Checksum Accelerator 58
- GFP Address Space 59
- External Registers 60
- Instruction Formats 62
- AIC-6915 Internal Registers 67
- AIC-6915 Address Space 74
- AIC-6915 PCI Address Map 74
- Terminology 76
- PCI Registers 77
- Byte Address: 04h - 05h 78
- 2:0 r 0 AddressSpaceIndicator 84
- Byte Address: 34h 86
- Byte Address: 3Ch 86
- Byte Address: 3Fh 88
- Byte Address: 40h - 43h 89
- Byte Address: 54h - 57h 95
- Ethernet Registers 99
- Type: R/W 100
- Byte Address: 74h - 77h 100
- Register Descriptions 101
- Transmit Registers 109
- OMPLETION 115
- Byte Address: BCh - BFh 116
- Byte Address: C0h - C3h 117
- Receive Registers 120
- Byte Address: F8h- FBh 130
- PCI Diagnostic Registers 131
- Byte Address: 0104h - 0107h 132
- Byte Address: 011Ch - 011Fh 136
- PCI CardBus Registers 138
- Byte Address: 013Ch - 013Fh 140
- Additional Ethernet Registers 141
- MAC Control Registers 143
- Byte Address: 5004h- 5007h 145
- Byte Address: 5070h - 5073h 152
- Address Filtering Registers 154
- MAC Statistic Registers 156
- Sample Driver 161
- // configuration space 163
- Receive Process 167
- Type 2 Completion Descriptor 168
- Type 3 Completion Descriptor 168
- 32-bit buffer descriptor 168
- 64-bit buffer descriptor 168
- Two Receive Queues 169
- Receive Polling Model 169
- Receive Initialization 169
- Receive Interrupt Handling 175
- Transmit Process 176
- Type 0 descriptor 178
- Type 1 descriptor 178
- Two Transmit Queues 180
- Transmit Initialization 181
- Transmit Handling 185
- AIC-6915 DDK Features 189
- DDK Development Environment 190
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